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Interruptions

Written By Share to you on Saturday, October 1, 2011 | 2:00 AM



Interrupt occurs when an I / O device wants to tell the processor that he was ready to take orders, output is produced, or in case of error.

Handling Interruptions

There are several stages in the handling of interrupts:
1. Controller sends an interrupt signal via interrupt-request-line
2. The signal detected by the processor
3. The processor will first store the information about the state of his state(tentangproses information that is being done)
4. The processor identifies the cause of interruptions and access the interrupt vectortable to determine the interrupt handler
5. Transfer control to the interrupt handler
6. After the interruption successfully resolved, the processor will return to the state as before the interruption and continue the work that had been delayed.

Interrupt Request Line

On most CPUs, there are two interrupt request line. First, nonmaskable interruptions, interruptions are usually derived from the hardware and must be immediately implemented, such as errors in memory. Second, maskable interrupts, interrupt type can be serviced by the processor or could not be served. Even if served, should be seen as the state of the processor. There is the possibility of directly addressing the processor if the time, the processor preemptive, nonpreemptive if, then must wait for the process of being worked over.

If there is an interrupt signal on interrupt request line, how an interrupt handler
knowing the source of the interruption? Do you have to trace all sources of interrupts one by one? No need, because every interrupt handler has a memory address of each. This address is offset in a table called the interrupt vector.

Interrupt Vectors and Vector Chaining

If there is an interrupt signal on interrupt request line, how an interrupt handler
knowing the source of the interruption? Do you have to trace all sources of interrupts one by one? No need, because every interrupt handler has a memory address of each. This address is offset in a table called the interrupt vector.

In accordance with the times, computers have more devices (and more interrupt handlers) than elements in the vector address. This can be overcome by vector chaining technique. Each element in the interrupt vector pointing to the head of a list of interrupt handlers, so if there is an interrupt, the handler found on the designated list will be called one by one until obtained handler that can handle the interrupt in question.
high-priority interrupts to interrupt the execution of low priority interrupts. This system also
allows the I / O devices that require immediate care should take precedence over
Other devices have a lower priority. Setting priorities and the handling of devices based on priorities set by the processor and interrupt controller.

Cause Interruptions

Interrupt mechanism is not only used to handle operations related to
device I / O. The operating system uses an interrupt mechanism for several reasons, among them:
1. exception handling
Exception is a condition where something happens, or the results obtained from an operation
considered certain special and should get more attention, for example, the division
by zero, accessing memory address that restricted or invalid, etc.
2. Set the virtual memory paging.
3. Handle software interrupt.
4. Handles the control flow kernel.
If the interruption occurs is a demand for large data transfers, then the use of
interruptions become inefficient, DMA is used to overcome them.


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