Communication Devices With Processors

Hello guys, we've talked about the device and how they are connected to the computer, now focus on next is how the processor communicates with the device. There are two approaches:

1. Instruction Input / Output directly.
Each device is numbered I / O ports along the 8 / 16 bit unique. On the transfer of data between the device registers and CPU registers used I / O instructions specific. I / O instructions is different than just regular instruction memory because the address I / O ports do not use the same location as the memory address. Therefore, the two following instructions:-in R3, 0x200, 4, - and-mov R3, 0x200 --- has two different meanings. The first instruction is an instruction I / O specifically requesting the CPU to read the value of register number 4 of the device I / O at 0x200 port number and then put it on number 3 in the CPU registers. The second instruction is an instruction memory that just copying the contents of ordinary memory address 0x200 to the three registers in the CPU.

2. Memory mapped.
This approach uses the address mapping I / O to memory. Data registers and data buffers
mapped into the address space used CPU.
The advantages memory mapped are:

 1. Processors will have fewer number of instructions that the processor does not need
provide instruction input I / O specifically.

2. Access to memory is done by ordinary memory instruction, so the drivers for the equipment can be written in C / C + + (for normal memory instruction) rather than assembly language (for I / O instructions specifically).

3. The operating system can control access to device I / O, ie by not putting the device address space on the virtual address space the process.
However, there is a significant problem in the memory mapped approach to the problem of caching.
In caching, the process of storing the contents of the new memory location is referenced, so if any instructions that refer to the same address do not need to take to memory again, thus caching can improve system performance. There was a problem on a system that repeatedly read the status registers on the device to see if the device is readily accessible. The first reading, the contents of status registers will be stored in the cache.
However, the next iteration will take the value from the cache rather than the status registers on the equipment. As a result, will not be known when the device is ready for use because
values ​​continue to read the first value stored in the cache, instead of updating the status of the device itself. To overcome this problem, the caching process is still being done except for a memory location where the registers of I / O mapped.

Some systems use both these techniques. For example in the use of graphics controller. Graphics controller has a port address I / O (for the approach to I / O instructions directly), but he also has a memory-mapped region to accommodate the large screen display. The process of changing the look with a write to memory-mapped region and the controller will adjust the screen display based on information from the memory mapped. Much faster to write millions of Bytes into graphics memory instead of loading millions of instructions. However, his weakness, is when the pointer is pointing to the wrong memory area and writing it.