DMA (Direct Memory Access Controler)

DMA

As was explained earlier that the interruption mechanism is not efficient to do large data transfers. Data transfer is done per word. On the mechanism of interruption, for each data word is transferred, the processor will not wait for the data available on the device that sends data and the data was completed by a device that receives data. In such situations the processor will replace the current process execution (which conduct data transfer) with another process (context switch).

If the size of data transferred is large enough, the processor will repeatedly perform context switch, but will cause a context switch overhead. Hence the weakness mechanism to handle data transfer interruptions that are caused by a context switch.

To address these weaknesses, used a special control unit provided for direct data transfer between external devices and main memory without the intervention of the processor continuously. Special control unit is DMA.

Modern systems can reduce the burden on the CPU to perform I / O, namely USING DMA controllers. Thus the CPU can perform other tasks while operating the I / O performed. Each controller equipment can only have its own DMA hardware.

Another alternative is to have a DMA controller on the motherboard is set to transfer to a variety of equipment.
To start the data transfer is DMA, the driver equipment will write DMA command block of memory pointed to a data source, destination, and the number of bytes to be transferred. CPU then sends this command block address on the DMA controller. DMA controller will process this information to then operate the memory bus.

Transfer as much as 1 byte / word per unit time by the controller referred to as cycle stealing DMA controller uses the bus because it's CPU cycles. With a cycle stealing bus by the CPU usage will be delayed several times because the bus is used for the DMA.

Three steps in the transfer DMA:
1. processor set up DMA transfers by providing data from the device, the operation will be displayed, the memory address of the source and destination data, and the number of bytes transferred.
2. DMA controller to start the operation (setting up a bus, provide the address, write and read data) samapai entire block has been transferred.
3. DMA controller interrupts the processor, in which further action will be determined next.